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See also:
- ASPIDA Project - ASynchronous, open source, Processor IP of the DLX Architecture. Goal: show feasibility to design and deliver asynchronous open IPs in portable, re-usable way. Information, downloads. Open source hardware.
- David R. Kaeli, Professor - Director of Northeastern University Computer Architecture Research Laboratory, and co-author of Computer Architecture: A Quantitative Approach. Professional information with some links.
- DLX Architecture - Introductory HTML slide show.
- DLX CPU in SCMOS - Photo with descriptions.
- DLX (deLuxe) - Instructions: R-, I-, J-Types. WinDLX download. WinDLX opcodes. DLX architecture diagram; Assembly examples: division by subtraction.
- DLX Explained - Basic description, pipeline focused.
- DLX Implementation at MSU - Documents DLX implementation by Microsystems Prototyping Laboratory (MPL), MSU Engineering Research Center; used as design driver to help validate standard cell libraries.
- DLX in VHDL - VHDL model of processor; most instructions use 5 clock cycles to run, jumps use 3, floating point timing not fully accurate because fp instructions also take 5 cycles to run; description, download.
- DLX Information - Documents: getting started, instruction set summary and description, simulator manual.
- The DLX Instruction Set Architecture Handbook - By Philip M. Sailer, David R. Kaeli; Morgan Kaufmann, 1996, ISBN 1558603719, 1st edition. Definitive work on DLX instructions. Information and abstract. ACM Portal.
- The DLX Instruction Set, BYU Edition - Expanded annotated list. By James Archibald, Brigham Young University.
- DLX Instruction Slides - Tables of instructions, categorized, as PDF slides. By Guy Even, Tel Aviv University. [PDF]
- DLX Pipeline Processor - Simple DLX implementation using VHDL; diagrams, descriptions, links.
- The DLX Processor - Class overview with tables (instruction format, set) and diagrams (timing), some other information. By Ethan Miller, University of Maryland.
- DLX Simulation Tools - Set of tools to build and simulate programs to run on DLX architecture, for exploring an operating system (DLXOS) in a simulated environment. Overview, architecture, OS, simulator, debugger, instructions.
- DLXview - Interactive visual pipeline simulator using DLX instruction set; operation of pipelined processor is easier to understand than trying to imagine operation from text descriptions; modified and extended from DLXsim. Documents, downloads.
- Implementation of 5-stage DLX Pipeline - Introductory tutorial with definitions, explanations, examples to show basic pipelining ideas; applet simulation lets users choose instructions to run, and see how pipeline works from direct experience.
- Introduction to Operating Systems - DLXOS information needed for programming, from introductory course on OSs.
- Norman Matloff's DLX Tutorial - Information on DLX processor simulator and compiler, DLXsim, interactive program, loads assembly programs and simulates operation of computer on them, single-stepping or continuous execution.
- Out of Order Execution - Master's Thesis: Design and Evaluation of a RISC Processor with a Tomasulo Scheduler. Uses DLX. HTML, PS, GZ, PDF.
- Superscalar DLX Processor - Diagram, description, download.
- Verilog Model for DLX Processor - PDF slides, mostly code. [PDF]
- Wikipedia: DLX - Encyclopedia article with links to many related topics.
- WinDLX - Program for MS Windows, an assembly interpreter for DLX assembly language; instructions, source code, downloads. By Javier Echaiz, National University of the South.
- Computer Architecture: A Quantitative Approach - By John L. Hennessy, David A. Patterson; Morgan Kaufmann, 2007, ISBN 9780123704900, 4th edition. Design in quantitative terms, in context of real running systems, not abstract formats; how technology changes in time, empirical constants needed in design. (2007)
- Computer Architecture: A Quantitative Approach - Book review, explains that book is a classic and standard work in its field. Ars Technica. (September, 1999)
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- Deftera Mevanan
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